Programmable integrated circuits (ICs) may be programmed by a user to perform specified logic functions. One type of programmable IC, known as a field programmable gate array (FPGA), is very popular because of a superior combination of capacity, flexibility, time-to-market, and cost. Programmable ICs provide the flexible hardware solutions ideal for high performance parallel computing required for advanced digital communications and video applications. For many complex applications, there has been a recent trend to implement a portion of the design in software and a portion of the design in programmable logic. Many manufacturers, such as Xilinx, Inc., include embedded processor systems in a number of programmable integrated circuits.
Embedded processor systems often include operating memory, software instruction storage, input/output, and other components of a computer system. These systems are referred to as system on chip (SOC) solutions. In these systems, designers may implement complex functions in programmable logic to increase efficiency and throughput. This architectural combination gives an advantageous mix of serial and parallel processing, flexibility, and scalability, thereby enabling a more optimized system partitioning—especially in the areas of intelligent video, digital communications, machine systems, and medical devices.
Given the variety of options available to designers, a design may include several portions split between software and programmable logic of one or more integrated circuits. However, implementing a suitable arrangement for communication between different portions poses a challenge to designers. Data bus architectures provide a convenient method to communicate data between the various portions of a system as well as with external devices.
Data busses may be implemented with a number of different data bus protocols such as the Peripheral Component Interconnect (PCI), the Advanced Microcontroller Bus Architecture (AMBA) bus architectures, etc. Designers implement interface circuits to communicate data to and from the data bus in a manner compliant with the chosen data bus protocol. However, because different logic cores and processors may communicate in different bit formats, implementation of interface circuitry can be challenging. The complexity of the interface circuitry may be further compounded for applications in which multiple data bus protocols are employed. For instance, AMBA Advanced Extensible Interface (AXI4) may be used to communicate between different portions of a system on a first bus, and the PCI Express protocol may be used to communicate with external devices connected to an I/O port of the system. The AXI4 protocol is fully described in the AMBA 4.0 specification and PCI Express is fully described in the PCI Express Base Specification 3.0.
Use of programmable circuitry of a programmable IC to implement interface circuits provides a designer with the flexibility to implement different communication protocols in a programmable IC as required for different applications. However, programmable circuitry has some performance limitations, such as longer signal delays and lower gate counts. As a result, communication circuits implemented in programmable circuitry may not provide a sufficient level of throughput for some applications.
To provide higher throughput, some programmable ICs may include several application specific integrated circuits (ASICs) that implement various circuits that may be utilized as part of a circuit design. However, ASIC circuitry must be implemented in advance, and thus reduces the space available for programmable resources and thereby reduces the circuit design options that may be implemented using the programmable IC. For instance, some programmable ICs may implement interface circuits that support one communication protocol. Some other programmable ICs may implement multiple sets of communication circuits, supporting different communication protocols. However, space restrictions may limit the number of ASIC communication circuits that can be implemented for a given protocol. Further resources and space may be wasted for circuitry to support communication protocols that may not be fully utilized.
The disclosed embodiments may address one or more of the above issues.